1. Field of the Invention
The present invention relates generally to systems and methods for interconnecting electronic packages and in particular to a power interconnection system mating between substrates to enable a low impedance disconnectable power delivery path between the power source and the load of an electronic package.
2. Description of the Related Art
High-speed microprocessor packaging must be designed to provide increasingly small form-factors. Meeting end user performance requirements with minimal form-factors while increasing reliability and manufacturability presents significant challenges in the areas of power distribution, thermal management, and electromagnetic interference (EMI) containment.
To increase reliability and reduce thermal dissipation requirements, newer generation processors are designed to operate with reduced voltage and higher current. Unfortunately, this creates a number of design problems.
First, the lowered operating voltage of the processor places greater demands on the power regulating circuitry and the conductive paths providing power to the processor. Typically, processors require supply voltage regulation to within 10% of nominal. In order to account for impedance variations in the path from the power supply to the processor itself, this places greater demands on the power regulating circuitry, which must then typically regulate power supply voltages to within 5% of nominal.
Lower operating voltages have also lead engineers away from centralized power supply designs to distributed power supply architectures in which power is bused where required at high voltages and low current, where it is converted to the low-voltage, high-current power required by the processor from nearby power conditioning circuitry.
While it is possible to place power conditioning circuitry on the processor package itself, this design is difficult to implement because of the unmanageable physical size of the components in the power conditioning circuitry (e.g. capacitors and inductors), and because the addition of such components can have a deleterious effect on processor reliability. Such designs also place additional demands on the assembly and testing of the processor packages as well.
Further exacerbating the problem are the transient currents that result from varying demands on the processor itself Processor computing demands vary widely over time, and higher clock speeds and power conservation techniques such as clock gating and sleep mode operation give rise to transient currents in the power supply. Such power fluctuations can require changes of thousands of amps within a few microseconds. The resulting current surge between the processor and the power regulation circuitry can create unacceptable spikes in the power supply voltage       (                  e        .        g        .                  xe2x80x83                ⁢        dv            =              IR        +                  L          ⁢                                    ⅆ              i                                      ⅆ              t                                            )    .
The package on which the device (die) typically resides must be connected to other circuitry in order for it to communicate and get power into and out of the device. Because the current slew-rates may be very high, a low impedance interconnection system is often needed to reduce voltage excursions between the power source and load which, if left unchecked, may cause false switching due to the reduced voltage seen at the load from a large voltage drop across the interconnect.
The technology of vertically stacking electronic substrates has been utilized for a number of years. As one example, U.S. Pat. No. 5,734,555, issued to McMahon (which is hereby incorporated by reference herein) discloses a method by which a circuit board containing power conversion elements is coplanar located over a circuit board containing an integrated circuit. The interconnect between the power conversion substrate and the integrated circuit substrate utilizes pins which do not provide a low impedance power path to the integrated circuit. Further, the McMahon device cannot be easily disassembled because the pins are permanently connected to the substrates. As another example, U.S. Pat. No. 5,619,339, (which is hereby incorporated by reference herein) issued to Mok discloses a printed circuit board (PCB) is vertically displaced over a multi-chip module (MCM) with electrical communication between the two substrates (the PCB and the MCM) established by a compliant interposer which contains xe2x80x9cfuzz buttonsxe2x80x9d which communicate with pads located on each substrate. Although such an approach does provide for disassembly of the two substrates, e.g., the MCM and the PCB, the approach does not provide for large xe2x80x98Zxe2x80x99 axis compliance to accommodate manufacturing tolerances, and does not teach the use of a contact design that is capable of handling large amounts of DC current. Further, this design requires the use of a compliant interposer. In order to handle such large amounts of current, the number of contacts would have to be increased dramatically, which would increase the inductance between the source and the load device. Furthermore, such a large array of such contacts would require a large amount of force to be applied to maintain contact and will not result in a space-efficient design.
From the foregoing, it can be seen that there is a need for a low impedance power interconnect between the power dissipating device and the power source. It can also be seen that this impedance must be low in inductance and resistance throughout a wide frequency band in order to ensure that the voltage drops across the interconnect are mitigated across it during dynamic switching of power. It can also be seen that the interconnect should provide large xe2x80x98zxe2x80x99 axis compliance.
To address the requirements described above, the present invention discloses an apparatus for providing power to a power dissipating device. The apparatus comprises a first circuit board and a second circuit board, and a plurality of compressible or non-compressible conductors disposed between first circuit board and the second circuit board.
The first circuit board includes a power conditioner circuit, and a first side and a second side having a plurality of first circuit board contacts thereon. The first circuit board contacts include a first set of first circuit board contacts communicatively coupled to a first power conditioner circuit connector and a second set of first circuit board contacts communicatively coupled to a second power conditioning circuit connector;
The second circuit board includes the power dissipating device mounted thereto; a plurality of second circuit board contacts disposed on a first side of the second circuit board facing the second side of the first circuit board. The second circuit board also includes a first set of second circuit board contacts communicatively coupled to a power dissipating device first connector and a second set of second circuit board contacts communicatively coupled to a second connector of the power dissipating device.
The plurality of z-axis compressible conductors includes a first set of z-axis compressible conductors disposed between the first set of first circuit board contacts and the first set of second circuit board contacts and a second set of z-axis compressible conductors disposed between the second set of first circuit board contacts and the second set of second circuit board contacts.
The first set of first circuit board contacts, the first set of z-axis compressible conductors, and the first set of second circuit board contacts define a plurality of first paths from the first circuit board to the second circuit board and wherein the second set of circuit board contacts, the second set of z-axis compressible conductors, and the second set of second circuit board contacts define a plurality of second paths from the first circuit board to the second circuit board.
The present invention provides a spring-like structure which disconnectably connects between two or more substrates (such as a printed circuit board or IC package) whereby the connection is disconnectable at least on one of the two sides. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect. Due to the low impedance connection, the design permits the displacement of bypass capacitors on the circuit board having the power dissipating device, and placement of these capacitors on the circuit board having the power conditioning circuitry, resulting in ease of manufacturing and improved reliability of the power dissipating device assembly.
The present invention reduces or eliminates the need for supporting electronic components for the power dissipating device on the substrate, since the interconnect impedance between the power source and the electronic device is sufficiently low so that all or most of the supporting electronics can be located on the substrate containing the power source. Since the present invention does not use any socket connectors to supply power to the device, such socket connectors are freed to provide additional signals.